A have complex instructions that take up multiple clock cycles for execution. RISC processors have simple instructions taking about one clock cycle.
B are highly pipelined. RISC processors are normally not pipelined or less pipelined.
C transfer complexity to the compiler that executes the program. The complexity of RISC lies in the micro program.
D have a fixed instruction format. RISC processors have variable instruction format.
E have multiple register sets. RISC processors only have a single register set.